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Hop the wag during working

External PPB 영역에 APB peripheral을 맵핑할 수 있는가?


Cortex-M3의 메모리 맵을 보면 0xE0040000~0xE0100000영역에
External Private Peripheral Bus영역이 있다.

이 영역은 APB버스를 사용하기 때문에 APB Peripheral을 사용할 경우 바로 붙일 수 있다.
(0x40000000~의 영역이 peripheral영역이긴 하지만 APB peripheral을 붙일 경우
AHB2APB Bridge가 필요하다.)

하지만 ARM은 이 EPPB버스에 APB peripheral의 사용을 권하지 않는다.
이유는 다음과 같다.

Can I place APB system peripherals in the External Private Peripheral Bus (External PPB) space?
Answer
The External PPB (EPPB) space (0xE0040000 up to 0xE0100000) is intended for CoreSight-compatible debug and trace components, and has a number of irregular limitations which make it less useful for regular system peripherals. ARM recommends that system peripherals are placed in suitable (Device type) areas of the System bus address space, with use of an AHB2APB bridge (protocol converter) for APB-based devices.
Limitations of the EPPB space are:
- it is accessible in privileged mode only
- it is accessed in little-endian fashion irrespective of the processor's data endianness setting
- accesses behave as Strongly Ordered
- no bit-band function is available
- unaligned accesses have unpredictable results
- only 32-bit data accesses are supported
- it is accessible from the Debug Port and the local processor, but not from any other agent (processor) in the system

Use of regular System space and an AHB2APB bridge for system peripherals removes most of these restrictions and causes the peripheral accesses to behave as a user would expect.

출처 : http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka14334.html